Semiconductor devices are commonly found in modern electronic products. Semiconductor devices vary in the number and density of electrical components. Discrete semiconductor devices generally contain one type of electrical component, e.g., light emitting diode (LED), small signal transistor, resistor, capacitor, inductor, and power metal-oxide-semiconductor field-effect transistor (MOSFET). Integrated semiconductor devices typically contain hundreds to millions of electrical components. Examples of integrated semiconductor devices include microcontrollers, microprocessors, and various signal processing circuits.
Semiconductor devices perform a wide range of functions such as signal processing, high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, transforming sunlight to electricity, and creating visual images for television displays. Semiconductor devices are found in the fields of entertainment, communications, power conversion, networks, computers, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment.
FIG. 1 illustrates electronic device 50 having a chip carrier substrate or printed circuit board (PCB) 52 with a plurality of semiconductor packages mounted on a surface of the PCB. Electronic device 50 can have one type of semiconductor package, or multiple types of semiconductor packages, depending on the application. Different types of semiconductor packages are shown in FIG. 1 for purposes of illustration.
Electronic device 50 can be a stand-alone system that uses the semiconductor packages to perform one or more electrical functions. Alternatively, electronic device 50 can be a subcomponent of a larger system. For example, electronic device 50 can be part of a tablet, cellular phone, digital camera, television, power supply, or other electronic device. Electronic device 50 can also be a graphics card, network interface card, or other expansion card that is inserted into a personal computer. The semiconductor packages can include microprocessors, memories, application specific integrated circuits (ASIC), programmable logic circuits, analog circuits, radio frequency (RF) circuits, discrete devices, or other semiconductor die or electrical components.
In FIG. 1, PCB 52 provides a general substrate for structural support and electrical interconnect of the semiconductor packages mounted on the PCB. Conductive signal traces 54 are formed over a surface or within layers of PCB 52 using evaporation, electrolytic plating, electroless plating, screen printing, or another suitable metal deposition process. Signal traces 54 provide for electrical communication between each of the semiconductor packages, mounted components, and other external system components. Traces 54 also provide power and ground connections to each of the semiconductor packages. A clock signal is transmitted between semiconductor packages via traces 54 in some embodiments.
For the purpose of illustration, several types of first level packaging, including bond wire package 56 and flipchip 58, are shown on PCB 52. Additionally, several types of second level packaging, including ball grid array (BGA) 60, bump chip carrier (BCC) 62, land grid array (LGA) 66, multi-chip module (MCM) 68, quad flat non-leaded package (QFN) 70, quad flat package 72, embedded wafer level ball grid array (eWLB) 74, and wafer level chip scale package (WLCSP) 76 are shown mounted on PCB 52. Depending upon the system requirements, any combination of semiconductor packages, configured with any combination of first and second level packaging styles, as well as other electronic components, can be connected to PCB 52.
A manufacturer of electronic device 50 provides a power signal to the electronic device which is used to power the semiconductor packages and other devices disposed on PCB 52. In many cases, the provided power signal is at a different voltage potential than the voltage required to operate the individual semiconductor devices. The manufacturer will generally provide a power conversion circuit on PCB 52 to generate a steady direct current (DC) voltage signal at a voltage potential usable by the individual semiconductor packages and other components connected to the PCB. Switch-mode power supplies (SMPS) are commonly used due to efficiency advantages.
An SMPS for electronic device 50 may be located on PCB 52, or located externally and connected to PCB 52 by a cable and plug. The plug may include both power and data lines, e.g., when electronic device 50 is a cell phone or tablet computer and power is provided by a Universal Serial Bus (USB) interface. In some embodiments, electronic device 50 follows the USB Power Delivery (USB-PD) protocol to negotiate a voltage potential for power delivery by an external SMPS.
An SMPS operates by switching an input power signal on and off repeatedly to create a relatively high-frequency power signal. The switched power signal is routed through a transformer or inductor, and then rectified and filtered to create a steady DC power signal. The output power signal is commonly rectified by one or more diodes, or a transistor is used for synchronous rectification.
A circuit diagram for one exemplary embodiment of a flyback SMPS 100 is illustrated in FIG. 2. SMPS 100 is split into a primary side 102 and a secondary side 104, which are delineated by transformer 105. Transformer 105 includes a primary winding 106 as part of primary side 102 and a secondary winding 108 as part of secondary side 104. Primary side 102 of SMPS 100 is made up of the components electrically connected to primary winding 106. Secondary side 104 of SMPS 100 is made up of the components electrically connected to secondary winding 108. Transformer 105 provides DC isolation between primary side 102 and secondary side 104. Alternating current (AC) signals through primary winding 106 are transferred to secondary winding 108 by magnetic coupling, while any DC offset is substantially ignored.
Primary side 102 includes a power input at bulk voltage (VBULK) node 110. In some embodiments, VBULK node 110 receives a rectified AC power signal provided by an electric utility at, e.g., 110 or 230 volts AC. The AC electric signal is routed to a residence, commercial office building, or other premises by power mains and input to the electronic device including SMPS 100 by plugging the device into a wall outlet. A diode bridge or other rectifier circuit rectifies the input AC mains signal to include positive voltage values at VBULK node 110. In other embodiments, a power signal is provided to VBULK node 110 by other means. A capacitor 111 is coupled between VBULK node 110 and ground node 113 to further filter the input power signal. Ground node 113 operates as the ground reference voltage for the electrical components of primary side 102.
Electric current from VBULK node 110 through primary winding 106 to ground node 113 is turned on and off by primary MOSFET 112. Primary MOSFET 112 includes a drain terminal coupled to primary winding 106 opposite VBULK node 110, a gate terminal 114 coupled to primary flyback controller 120, and a source terminal coupled to current sense resistor 118 at current sense (CS) node 119. The source and drain terminals of primary MOSFET 112 are conduction terminals, and the gate is a control terminal. Controller 120 turns on, or enables electric conduction through, primary MOSFET 112 by providing a positive voltage potential at the gate terminal of the MOSFET via circuit node (DRV) 114. In some embodiments, additional driver circuitry is coupled between controller 120 and the gate of MOSFET 112. When primary MOSFET 112 is turned on, electric current flows from VBULK node 110 to ground node 113 through primary winding 106, primary MOSFET 112, and resistor 118 in series. Controller 120 turns off primary MOSFET 112 by outputting a ground voltage potential to the gate of primary MOSFET 112. While primary MOSFET 112 is off, no significant current flows from VBULK node 110 through primary winding 106.
In the ideal case, an n-channel MOSFET exhibits zero resistance when its gate has a positive voltage potential, and exhibits infinite resistance when its gate is at ground potential. MOSFET 112 is an n-channel MOSFET that operates as a switch opened and closed by a control signal from controller 120 coupled to the MOSFET's gate terminal 114. A switch, e.g., MOSFET 112, being closed is also referred to as the switch being “on,” because electric current is able to flow between conduction terminals of the switch. An open switch is referred to as being “off” because current does not flow significantly between the conduction terminals of the switch. While the switch of SMPS 100 is illustrated as a MOSFET, other types of electronically controlled switches, e.g., bipolar-junction transistors (BJTs), p-channel MOSFETs, gallium arsenide transistors, junction gate field-effect transistor, other types of field-effect transistors (FETs), and other types of electronic switches, are used in other embodiments. FETs include source and drain terminals, which are conduction terminals, and a gate terminal as a control terminal. BJTs include emitter and collector terminals, which are conduction terminals, and a base terminal as a control terminal.
Controller 120 determines when to switch primary MOSFET 112 by observing the magnitude of current through primary winding 106. Resistor 118 creates a voltage potential difference between ground node 113 and CS node 119 when current flows through the resistor. The voltage potential across resistor 118, as observed at CS node 119, is approximately proportional to the current through primary winding 106. CS node 119 is coupled to a current sense input pin of controller 120. Controller 120 observes the voltage potential at CS node 119 to determine the electric current magnitude through primary winding 106.
While controller 120 has primary MOSFET 112 turned on, electric current through primary winding 106 increases approximately linearly and magnetizes transformer 105. When controller 120 turns off primary MOSFET 112, electric current through primary winding 106 is substantially stopped. The magnetic energy stored in transformer 105 while MOSFET 112 is closed is output as electric current through secondary winding 108 while MOSFET 112 is open, creating a positive voltage potential at voltage output (VOUT) node 124 relative to ground node 126. Ground node 126 operates as the ground reference voltage for electrical components of secondary side 104. SMPS 100 is an isolated topology, meaning a separate primary side ground node 113 and secondary side ground node 126 are used. The voltage potential of ground node 126 is allowed to float relative to ground node 113.
The voltage potential at VOUT node 124 charges capacitor 128 and powers additional circuit components of electronic device 50 connected to SMPS 100 as a load. The cycle repeats when controller 120 turns on primary MOSFET 112 to again magnetize transformer 105. Capacitor 128 provides power to VOUT node 124 while primary MOSFET 112 is on. Diode 130 rectifies current through secondary winding 108 by reducing electric current flowing from VOUT node 124 to ground node 126 through secondary winding 108 while transformer 105 is being magnetized from primary side 102.
Feedback is provided from secondary side 104 to primary side 102 by Zener diode 154 and optocoupler 155. Optocoupler 155 includes an LED 156 and a phototransistor 158. If the voltage potential at VOUT node 124 exceeds the Zener voltage of Zener diode 154 summed with the voltage drop of LED 156, current flows from VOUT node 124 to ground node 126 through Zener diode 154 and LED 156 in series. Photons emitted by LED 156 hit phototransistor 158, which turns on the phototransistor and increases the coupling of feedback (FB) node 160 of primary flyback controller 120 to ground node 113. As current through LED 156 is increased, the coupling of FB node 160 to ground node 113 through phototransistor 158 is increased, and the voltage potential of FB node 160 is further reduced.
As controller 120 observes voltage potential at FB node 160 being reduced, the controller understands that voltage potential at VOUT node 124 is at or above a desired output voltage potential. Controller 120 takes measures as configured to reduce power transfer from primary side 102 to secondary side 104, e.g., reducing on-time of MOSFET 112 or reducing the switching frequency of DRV signal 114.
FIGS. 3a-3b illustrate SMPS 100 operating in continuous conduction mode (CCM). FIG. 3a illustrates current through primary winding 106, and FIG. 3b illustrates current through secondary winding 108. SMPS 100 operates in two distinct states. Between time 1 and time 2, MOSFET 112 is turned on, and transformer 105 is being magnetized by current from VBULK node 110 to ground node 113 increasing through primary winding 106 as shown in FIG. 3a. At time 2, controller 120 turns off MOSFET 112. Current through primary winding substantially ceases, and the magnetic energy stored in transformer 105 induces an electrical current in secondary winding 108 as seen in FIG. 3b. The electric current through secondary winding 108 charges capacitor 128 and powers the load connected between VOUT node 124 and ground node 126. At time 3, before transformer 105 is fully demagnetized, MOSFET 112 is switched back on. Current through primary winding 106 again increases. Between time 3 and time 4, current through secondary winding is approximately zero due to rectification by diode 130. The load connected to VOUT node 124 is powered by electric charge stored in capacitor 128 during periods when no current is being induced through secondary winding 108.
In FIGS. 3a-3b, TSW is the switching period of DRV signal 114, i.e., the power cycle period of SMPS 100. TON is the amount of time each switching period TSW that MOSFET 112 is on, and TOFF is the amount of time each switching period TSW that MOSFET 112 is off. IPEAK,P is the magnitude of current through primary winding 106 at the current peak, i.e., at time 2 as MOSFET 112 is being switched off. IVALLEY,P is the magnitude of current through primary winding 106 at the current valley, i.e., at time 1 as MOSFET 112 is being switched on. Similarly, IPEAK,S is the magnitude of the current peak through secondary winding 108, e.g., at time 2, and IVALLEY,S is the magnitude of the current valley through secondary winding 108, e.g., at time 3.
FIGS. 4a-4b illustrate SMPS 100 operating in discontinuous conduction mode (DCM). FIG. 4a illustrates electric current through primary winding 106 over time, and FIG. 4b illustrates electric current through secondary winding 108 over time. In DCM, SMPS 100 includes two states similar to the states in CCM. From time 1 to time 2, MOSFET 112 is turned on to magnetize transformer 105. Between time 2 and time 3, MOSFET 112 is turned off, and the magnetic energy stored in transformer 105 is discharged to secondary side 104. Unlike in CCM, DCM allows transformer 105 to become nearly fully discharged. At time 3, the magnetic energy stored in transformer 105 has been nearly completely discharged. However, MOSFET 112 is not turned on again until time 4. Between time 3 and time 4 in FIGS. 4a-4b, there is approximately zero current through both primary winding 106 and secondary winding 108. MOSFET 112 does not turn back on to magnetize transformer 105 again until time 4 in FIGS. 4a-4b. 
In FIGS. 4a-4b, TDEM represents the amount of time that transformer 105 takes to nearly fully demagnetize (demag-time). In DCM, the demag-time TDEM of transformer 105 is less than the amount of time that MOSFET 112 is off, i.e., TDEM is less than TOFF.
Electronic devices that utilize switch-mode power supplies, such as electronic device 50 using SMPS 100, must often include circuitry to limit output current in order to meet safety requirements. In some cases, switch-mode power supplies operate at variable output voltages. However, flyback converters that use current mode feedback are capable of delivering increased electrical current when the output voltage is reduced. The increased current output at lower output voltage results in current output that exceeds safe limits.
Others have tried sampling the signal at CS node 119 halfway through TON to estimate average secondary current, and integrating the sample value over TOFF or TDEM using an operational amplifier (op-amp) to estimate output current of an SMPS. The op-amp output was been compared against a fixed voltage threshold to detect over-current. However, accurately sampling CS node 119 at the proper time is challenging. In addition, comparing the integral against a fixed voltage threshold does not accurately account for changes in output voltage of the SMPS.